Modern FPGAs and servers operating at low voltages are sensitive to subtle supply drops. The droop may result from a combination of excess regulator noise, insufficient bandwidth in the supply regulator, excess ESR & ESL in the decoupling components, or distributed inductance in the power distribution.
To abate the risk of supply droop the typical approach is to surround the processor with an assortment of ceramic and bulk capacitors, thereby lending broadband support to the supplies with capacitors. This consumes board area and component budget.
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